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Serial Quad I/O (SQI) Flash Memory
A Microchip Technology Company
SST26VF016 / SST26VF032
Data Sheet
Power-Up Specifications
All functionalities and DC specifications are specified for a V DD ramp rate of greater than 1V per 100
ms (0V to 2.7V in less than 270 ms). See Table 11 and Figure 25 for more information.
Table 11: Recommended System Power-up Timings
Symbol
T PU-READ1
Parameter
V DD Min to Read Operation
Minimum
100
Units
μs
T PU-WRITE
1
V DD Min to Write Operation
100
μs
T11.0 25017
1. This parameter is measured only for initial qualification and after a design or process change that could affect this
parameter.
V DD
V DD Max
Chip selection is not allowed.
Commands may not be accepted or properly
interpreted by the device.
V DD Min
T PU-READ
T PU-WRITE
Device fully accessible
Time
1359 F27.0
Figure 25: Power-up Timing Diagram
?2011 Silicon Storage Technology, Inc.
31
DS-25017A
04/11
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